Merge pull request #132 from tslater2006/master ...

Add sdmmc_dump_regs function

Fix race conditions and misconfiguration in sdmmc ...

Properly configure pull up and pull down offsets for autocal.
Run autocal prior to every transfer.

Prevent race conditions in sdmmc_wait_for_event() - make sure the fault
handler has highest priority, then the target irq, state conditions and
finally the error mask.

Do not clear all bits (|=) when acknowledging fault conditions,
only acknowledge the fault conditions itself.

Enable interrupts before preparing command registers - if sdmmc is fast
enough it can actually finish transfer before we enabled the interrupts.
Enabling interrupts clears the COMMAND COMPLETE status bit.

Temporarily print all the sdmmc messages in stage2 - for yet unknown
reason respecting the log level results in some failures.

This results in working microsd card in stage2 on my switch with Samsung
EVO+ 256GB microsd card.

Switched to mmc_debug, and use inttypes

use printf instead of printk for secondary

Add sdmmc_dump_regs function

Make sdmmc autocalibration follow TRM procedure ...

Sleep for 1 us, not 1 ms.
Timeout after 10 ms, set driver strength code values according to TRM.

Fix typo (mS) - time is in milliseconds, not milliSiemens.

Fix logic bug in stage2's main function

package2 verification and ini1 merging fixes (#125) ...

* fusee: Incremet offset while reading kip1s

* fusee: Pass package2 section data along with the decrypted metadata

Pass screen status and mmc struct from stage1 to 2

Merge pull request #114 from desowin/sdmmc-errata ...

Set SDMMC controller to SDR104 as a workaround

fusee: Add kernel hash for 4.x

Fusee: Add 5.x kernel patches to allow for IPC PID mitm.

Fusee: Add mechanism for branching back at end of hook.

Fix CCPLEX bringup and halt the BPMP once it's done booting. (#118)

Fusee: Add infrastructure for applying kernel patches (needed for mitm)

Fusee: Separate kernel patching into its own file.

Set SDMMC controller to SDR104 as a workaround ...

According to Tegra X1 Series Processors Silicon Errata there is possible
misalignment of received data which results in a CRC error. The issue is
present only in SDR50 mode.

Refactor fusee's makefile

Fix mmc->allow_voltage_switching assignment in sdmmc_init

Copy latest sdmmc driver to stage2

Add debug comment for exosphère

Unstub "Validate section hashes."

fusee: work around some dual-init SDMMC issues

Stage1: fix SE issue too

Fusee: Fix se_calculate_sha256

Use uintX_t for the SE & copy bugfixed SE struct definition

Stage2: Fix bug, add more debug printfs to nxboot. The CCPLEX doesn't turn on

Stage2: fix various bugs in package2.c

Fix bug in stratosphere_get_ini1, etc.

stage2: package2: bypass hash checks for now