diff --git a/source/arm11/hardware/exception.s b/source/arm11/hardware/exception.s
index 4cddfd3..b8c652a 100644
--- a/source/arm11/hardware/exception.s
+++ b/source/arm11/hardware/exception.s
@@ -67,8 +67,7 @@
 	srsfd sp!, #31               @ Store lr and spsr on system mode stack
 	cps #31                      @ Switch to system mode
 	stmfd sp!, {r0-r3, r12, lr}
-	mov r12, #0x17000000
-	orr r12, r12, #0xE00000
+	ldr r12, =0x17E00000
 	ldr r0, [r12, #0x10C]        @ REG_CPU_II_AKN
 	and r1, r0, #0x7F
 	cmp r1, #32
@@ -81,11 +80,15 @@
 	ldr r3, [r2, r1, lsl #2]
 	cmp r3, #0
 	beq irqHandler_skip_processing
-	stmfd sp!, {r0, r12}
+	and r2, sp, #4
+	sub sp, sp, r2               @ Adjust stack for ABI compliance
+	stmfd sp!, {r0, r2}
 	cpsie i
 	blx r3
 	cpsid i
-	ldmfd sp!, {r0, r12}
+	ldmfd sp!, {r0, r2}
+	add sp, sp, r2
+	ldr r12, =0x17E00000
 irqHandler_skip_processing:
 	str r0, [r12, #0x110]        @ REG_CPU_II_EOI
 	ldmfd sp!, {r0-r3, r12, lr}
diff --git a/source/arm11/start.s b/source/arm11/start.s
index a050752..60fa8da 100644
--- a/source/arm11/start.s
+++ b/source/arm11/start.s
@@ -245,9 +245,7 @@
 	bx r3
 
 
-.pool
 _sysmode_stacks:
 	.word A11_C0_STACK_END      @ Stack for core 0
 	.word A11_C1_STACK_END      @ Stack for core 1
-	.word 0                     @ New 3DS cores are not used at all
-	.word 0
+.pool
diff --git a/source/arm9/hardware/exception.s b/source/arm9/hardware/exception.s
index 84cde51..ff82385 100644
--- a/source/arm9/hardware/exception.s
+++ b/source/arm9/hardware/exception.s
@@ -67,8 +67,8 @@
 	stmfd sp!, {r0-r3, r12, lr}
 	mov r12, #0x10000000
 	orr r12, #0x1000                 @ REG_IRQ_IE
-	ldm r12, {r1, r2}
-	and r1, r1, r2
+	ldrd r0, r1, [r12]
+	and r1, r0, r1
 	mov r3, #0x80000000
 	irqHandler_find_first_lp:
 		clz r2, r1
@@ -83,10 +83,15 @@
 	beq irqHandler_skip_processing
 	mrs r3, spsr
 	str r3, [sp, #-4]!
-	msr cpsr_c, #0x5F                @ System mode, IRQ enabled
-	str lr, [sp, #-4]!
+	msr cpsr_c, #0xDF                @ System mode, IRQ disabled
+	and r3, sp, #4
+	sub sp, sp, r3                   @ Adjust stack for ABI compliance
+	stmfd sp!, {r3, lr}
+	msr cpsr_c, #0x5F                @ IRQ enabled
 	blx r2
-	ldr lr, [sp], #4
+	msr cpsr_c, #0xDF                @ IRQ disabled
+	ldmfd sp!, {r3, lr}
+	add sp, sp, r3
 	msr cpsr_c, #0xD2                @ IRQ mode, IRQ disabled
 	ldr r0, [sp], #4
 	msr spsr_fsxc, r0