diff --git a/Makefile b/Makefile
index b0cec20..09130f8 100644
--- a/Makefile
+++ b/Makefile
@@ -7,10 +7,10 @@
 
 export TARGET := $(notdir $(CURDIR))
 ENTRY9        := 0x08000054
-ENTRY11       := 0x1FF85040
+ENTRY11       := 0x1FF89040
 SECTION0_ADR  := 0x08000040
 SECTION0_TYPE := 0
-SECTION1_ADR  := 0x1FF85000
+SECTION1_ADR  := 0x1FF89000
 SECTION1_TYPE := 1
 
 
diff --git a/arm11/arm11.ld b/arm11/arm11.ld
index 1b0b2dd..6612651 100644
--- a/arm11/arm11.ld
+++ b/arm11/arm11.ld
@@ -13,7 +13,7 @@
 {
 	/* =========== CODE section =========== */
 
-	. = 0x1FF85000;
+	. = 0x1FF89000;
 	__start__ = . ;
 
 	.text ALIGN(4) :
diff --git a/include/mem_map.h b/include/mem_map.h
index bce0eca..f0d173b 100644
--- a/include/mem_map.h
+++ b/include/mem_map.h
@@ -135,15 +135,17 @@
 
 
 #ifdef ARM11
-#define A11_MMU_TABLES_BASE  (AXIWRAM_BASE)
+#define A11_C0_STACK_START   (AXIWRAM_BASE)                // Core 0 stack
+#define A11_C0_STACK_END     (A11_C0_STACK_START + 0x2000)
+#define A11_C1_STACK_START   (A11_C0_STACK_END)            // Core 1 stack
+#define A11_C1_STACK_END     (A11_C1_STACK_START + 0x2000)
+#define A11_EXC_STACK_START  (VRAM_BASE + VRAM_SIZE - 0x200000)
+#define A11_EXC_STACK_END    (VRAM_BASE + VRAM_SIZE - 0x100000)
+#define A11_MMU_TABLES_BASE  (A11_C1_STACK_END)
 #define	A11_VECTORS_START    (AXIWRAM_BASE + AXIWRAM_SIZE - 0x60)
 #define A11_VECTORS_SIZE     (0x60)
 #define A11_FALLBACK_ENTRY   (AXIWRAM_BASE + AXIWRAM_SIZE - 0x4)
 #define A11_STUB_ENTRY       (AXIWRAM_BASE + AXIWRAM_SIZE - 0x200)
 #define	A11_STUB_SIZE        (0x1A0) // Don't overwrite the vectors
 #define A11_HEAP_END         (AXIWRAM_BASE + AXIWRAM_SIZE)
-#define A11_STACK_START      (A11_STUB_ENTRY - 0xE00)
-#define A11_STACK_END        (A11_STUB_ENTRY)
-#define A11_EXC_STACK_START  (VRAM_BASE + VRAM_SIZE - 0x200000)
-#define A11_EXC_STACK_END    (VRAM_BASE + VRAM_SIZE - 0x100000)
 #endif
diff --git a/source/arm11/hardware/mmu.c b/source/arm11/hardware/mmu.c
index 5029a96..2ce31db 100644
--- a/source/arm11/hardware/mmu.c
+++ b/source/arm11/hardware/mmu.c
@@ -143,17 +143,22 @@
 		//            PERM_PRIV_RW_USR_NO_ACC, 1, true,
 		//            L1_TO_L2(MAKE_CUSTOM_NORM_ATTR(POLICY_WRITE_BACK_ALLOC_BUFFERED, POLICY_WRITE_BACK_ALLOC_BUFFERED)));
 
+		// AXIWRAM core 0/1 stack mapping
+		mmuMapPages(A11_C0_STACK_START, A11_C0_STACK_START, 4, (u32*)(A11_MMU_TABLES_BASE + 0x4400u),
+		            true, PERM_PRIV_RW_USR_NO_ACC, 1, true,
+		            L1_TO_L2(MAKE_CUSTOM_NORM_ATTR(POLICY_WRITE_BACK_ALLOC_BUFFERED, POLICY_WRITE_BACK_ALLOC_BUFFERED)));
+
 		// AXIWRAM MMU table mapping
 		mmuMapPages(A11_MMU_TABLES_BASE, A11_MMU_TABLES_BASE, 5, (u32*)(A11_MMU_TABLES_BASE + 0x4400u), true,
 		            PERM_PRIV_RO_USR_NO_ACC, 1, true, L1_TO_L2(ATTR_NORM_NONCACHABLE));
 
-		// Remaining AXIWRAM pages
-		mmuMapPages(AXIWRAM_BASE + 0x5000u, AXIWRAM_BASE + 0x5000u, 123,
-		            (u32*)(A11_MMU_TABLES_BASE + 0x4400u), true, PERM_PRIV_RW_USR_NO_ACC, 1, false,
-		            L1_TO_L2(MAKE_CUSTOM_NORM_ATTR(POLICY_WRITE_BACK_ALLOC_BUFFERED, POLICY_WRITE_BACK_ALLOC_BUFFERED)));
-
 		extern u32 __start__[];
 
+		// Remaining AXIWRAM pages
+		mmuMapPages((u32)__start__, (u32)__start__, 119, (u32*)(A11_MMU_TABLES_BASE + 0x4400u),
+		            true, PERM_PRIV_RW_USR_NO_ACC, 1, false,
+		            L1_TO_L2(MAKE_CUSTOM_NORM_ATTR(POLICY_WRITE_BACK_ALLOC_BUFFERED, POLICY_WRITE_BACK_ALLOC_BUFFERED)));
+
 		// Map fastboot executable start to boot11 mirror (exception vectors)
 		mmuMapPages(BOOT11_MIRROR2, (u32)__start__, 1, (u32*)(A11_MMU_TABLES_BASE + 0x4800u), true,
 		            PERM_PRIV_RO_USR_NO_ACC, 1, false,
diff --git a/source/arm11/start.s b/source/arm11/start.s
index f6d3fa9..6f73ff6 100644
--- a/source/arm11/start.s
+++ b/source/arm11/start.s
@@ -158,10 +158,9 @@
 		b _start_lp
 .pool
 _sysmode_stacks:
-	.word A11_STACK_END
-	.word (VRAM_BASE + VRAM_SIZE) @ Stack for core 1 for now.
-	                              @ Since we don't use core 1 this should be ok
-	.word 0
+	.word A11_C0_STACK_END      @ Stack for core 0
+	.word A11_C1_STACK_END      @ Stack for core 1
+	.word 0                     @ New 3DS cores are not used at all
 	.word 0