diff --git a/include/arm9/ndma.h b/include/arm9/ndma.h
index ef5d3de..a0426eb 100644
--- a/include/arm9/ndma.h
+++ b/include/arm9/ndma.h
@@ -11,11 +11,14 @@
 
 
 
-// This bit has no effect it seems.
-#define NDMA_GLOBAL_ENABLE     (1u)
+// REG_NDMA_GLOBAL_CNT
+#define NDMA_ROUND_ROBIN(n)    (1u<<31 | ((u32)log2(n) + 1)<<16 | 1u) // n = number of CPU cycles
+#define NDMA_HIGHEST_PRIO      (1u)
 
+// REG_NDMA_BLOCK_CNT
 #define NDMA_BLOCK_SYS_FREQ    (0u)
 
+// REG_NDMA_CNT
 #define NDMA_DST_UPDATE_INC    (0u)
 #define NDMA_DST_UPDATE_DEC    (1u<<10)
 #define NDMA_DST_UPDATE_FIXED  (2u<<10)
@@ -26,10 +29,8 @@
 #define NDMA_SRC_UPDATE_FILL   (3u<<13)
 #define NDMA_SRC_ADDR_RELOAD   (1u<<15)
 #define NDMA_STARTUP_MODE(n)   (n<<24)
-
 // The block length is 2^n words (Example: 2^15 = 32768 words = 0x20000 bytes)
 #define NDMA_BURST_SIZE(n)     ((u32)log2(n)<<16)
-#define NDMA_IMMEDIATE_MODE    (1u<<28)
 #define NDMA_REPEATING_MODE    (1u<<29)
 #define NDMA_IRQ_ENABLE        (1u<<30)
 #define NDMA_ENABLE            (1u<<31)
@@ -37,22 +38,23 @@
 
  enum
  {
- 	NDMA_STARTUP_UNK_0   = (0 <<24),
- 	NDMA_STARTUP_UNK_1   = (1 <<24),
- 	NDMA_STARTUP_UNK_2   = (2 <<24),
- 	NDMA_STARTUP_UNK_3   = (3 <<24),
- 	NDMA_STARTUP_UNK_4   = (4 <<24),
- 	NDMA_STARTUP_UNK_5   = (5 <<24),
- 	NDMA_STARTUP_UNK_6   = (6 <<24),
- 	NDMA_STARTUP_UNK_7   = (7 <<24),
- 	NDMA_STARTUP_AES_IN  = (8 <<24), // AES write fifo
- 	NDMA_STARTUP_AES_OUT = (9 <<24), // AES read fifo
- 	NDMA_STARTUP_UNK_10  = (10<<24),
- 	NDMA_STARTUP_UNK_11  = (11<<24),
- 	NDMA_STARTUP_UNK_12  = (12<<24),
- 	NDMA_STARTUP_UNK_13  = (13<<24),
- 	NDMA_STARTUP_UNK_14  = (14<<24),
- 	NDMA_STARTUP_UNK_15  = (15<<24)
+ 	NDMA_STARTUP_UNK_0      = (0<<24),
+ 	NDMA_STARTUP_UNK_1      = (1<<24),
+ 	NDMA_STARTUP_UNK_2      = (2<<24),
+ 	NDMA_STARTUP_UNK_3      = (3<<24),
+ 	NDMA_STARTUP_UNK_4      = (4<<24),
+ 	NDMA_STARTUP_UNK_5      = (5<<24),
+ 	NDMA_STARTUP_UNK_6      = (6<<24),
+ 	NDMA_STARTUP_UNK_7      = (7<<24),
+ 	NDMA_STARTUP_AES_IN     = (8<<24),  // AES write fifo
+ 	NDMA_STARTUP_AES_OUT    = (9<<24),  // AES read fifo
+ 	NDMA_STARTUP_UNK_10     = (10<<24),
+ 	NDMA_STARTUP_UNK_11     = (11<<24),
+ 	NDMA_STARTUP_UNK_12     = (12<<24),
+ 	NDMA_STARTUP_UNK_13     = (13<<24),
+ 	NDMA_STARTUP_UNK_14     = (14<<24),
+ 	NDMA_STARTUP_UNK_15     = (15<<24),
+ 	NDMA_STARTUP_IMMEDIATE  = (16<<24)
  };
 
 
diff --git a/source/arm9/firm.c b/source/arm9/firm.c
index 00d2285..c98e9c2 100644
--- a/source/arm9/firm.c
+++ b/source/arm9/firm.c
@@ -69,7 +69,7 @@
 		REG_NDMA_WRITE_CNT(i) = section->size>>2;
 		REG_NDMA_BLOCK_CNT(i) = NDMA_BLOCK_SYS_FREQ;
 		REG_NDMA_CNT(i) = NDMA_DST_UPDATE_INC | NDMA_SRC_UPDATE_INC
-							| NDMA_IMMEDIATE_MODE | NDMA_ENABLE;
+							| NDMA_STARTUP_IMMEDIATE | NDMA_ENABLE;
 	}
 
 	while(REG_NDMA0_CNT & NDMA_ENABLE || REG_NDMA1_CNT & NDMA_ENABLE
diff --git a/source/arm9/ndma.c b/source/arm9/ndma.c
index 87711a3..8262b3c 100644
--- a/source/arm9/ndma.c
+++ b/source/arm9/ndma.c
@@ -13,13 +13,13 @@
 
 void NDMA_init(void)
 {
-	REG_NDMA_GLOBAL_CNT = 0;
-
 	for(u32 i = 0; i < 8; i++)
 	{
-		REG_NDMA_CNT(i) = 0;
+		REG_NDMA_CNT(i) = (REG_NDMA_CNT(i)<<1)>>1;
 	}
 
+	REG_NDMA_GLOBAL_CNT = NDMA_ROUND_ROBIN(32);
+
 	REG_IRQ_IE |= ((1u<<IRQ_DMAC_1_0) | (1u<<IRQ_DMAC_1_1) | (1u<<IRQ_DMAC_1_2) | (1u<<IRQ_DMAC_1_3) |
 					(1u<<IRQ_DMAC_1_4) | (1u<<IRQ_DMAC_1_5) | (1u<<IRQ_DMAC_1_6) | (1u<<IRQ_DMAC_1_7));
 }
@@ -33,7 +33,7 @@
 	REG_NDMA7_DST_ADDR = (u32)dest;
 	REG_NDMA7_WRITE_CNT = num;
 	REG_NDMA7_BLOCK_CNT = NDMA_BLOCK_SYS_FREQ;
-	REG_NDMA7_CNT = NDMA_ENABLE | NDMA_IRQ_ENABLE | NDMA_IMMEDIATE_MODE | NDMA_SRC_UPDATE_INC | NDMA_DST_UPDATE_INC;
+	REG_NDMA7_CNT = NDMA_ENABLE | NDMA_IRQ_ENABLE | NDMA_STARTUP_IMMEDIATE | NDMA_SRC_UPDATE_INC | NDMA_DST_UPDATE_INC;
 
 	while(REG_NDMA7_CNT & NDMA_ENABLE)
 	{
@@ -49,7 +49,7 @@
 	REG_NDMA7_WRITE_CNT = num;
 	REG_NDMA7_BLOCK_CNT = NDMA_BLOCK_SYS_FREQ;
 	REG_NDMA7_FILL_DATA = value;
-	REG_NDMA7_CNT = NDMA_ENABLE | NDMA_IRQ_ENABLE | NDMA_IMMEDIATE_MODE | NDMA_SRC_UPDATE_FILL | NDMA_DST_UPDATE_INC;
+	REG_NDMA7_CNT = NDMA_ENABLE | NDMA_IRQ_ENABLE | NDMA_STARTUP_IMMEDIATE | NDMA_SRC_UPDATE_FILL | NDMA_DST_UPDATE_INC;
 
 	while(REG_NDMA7_CNT & NDMA_ENABLE)
 	{