diff --git a/include/asmfunc.h b/include/asmfunc.h new file mode 100644 index 0000000..56d52ec --- /dev/null +++ b/include/asmfunc.h @@ -0,0 +1,14 @@ +#pragma once + +#if !__ASSEMBLER__ + #error Only include this in assembly files! +#endif + + +.macro ASM_FUNC name + .section .text.\name, "ax", %progbits + .global \name + .type \name %function + .align 2 +\name: +.endm diff --git a/source/arm11/cache.s b/source/arm11/cache.s index 5c0f678..01f3ea1 100644 --- a/source/arm11/cache.s +++ b/source/arm11/cache.s @@ -1,33 +1,15 @@ +#include "asmfunc.h" + .arm .cpu mpcore .fpu vfpv2 -.global invalidateICache -.global invalidateICacheRange -.global flushDCache -.global flushInvalidateDCache -.global flushDCacheRange -.global flushInvalidateDCacheRange -.global invalidateDCache -.global invalidateDCacheRange - -.type invalidateICache STT_FUNC -.type invalidateICacheRange STT_FUNC -.type flushDCache STT_FUNC -.type flushInvalidateDCache STT_FUNC -.type flushDCacheRange STT_FUNC -.type flushInvalidateDCacheRange STT_FUNC -.type invalidateDCache STT_FUNC -.type invalidateDCacheRange STT_FUNC - -.section ".text" - #define CACHE_LINE_SIZE (32) -invalidateICache: +ASM_FUNC invalidateICache mov r0, #0 mcr p15, 0, r0, c7, c5, 0 @ Invalidate Entire Instruction Cache, also flushes the branch target cache @mcr p15, 0, r0, c7, c5, 6 @ Flush Entire Branch Target Cache @@ -36,7 +18,7 @@ bx lr -invalidateICacheRange: +ASM_FUNC invalidateICacheRange add r1, r1, r0 bic r0, r0, #(CACHE_LINE_SIZE - 1) mov r2, #0 @@ -51,21 +33,21 @@ bx lr -flushDCache: +ASM_FUNC flushDCache mov r0, #0 mcr p15, 0, r0, c7, c10, 0 @ "Clean Entire Data Cache" mcr p15, 0, r0, c7, c10, 4 @ Data Synchronization Barrier bx lr -flushInvalidateDCache: +ASM_FUNC flushInvalidateDCache mov r0, #0 mcr p15, 0, r0, c7, c14, 0 @ "Clean and Invalidate Entire Data Cache" mcr p15, 0, r0, c7, c10, 4 @ Data Synchronization Barrier bx lr -flushDCacheRange: +ASM_FUNC flushDCacheRange add r1, r1, r0 bic r0, r0, #(CACHE_LINE_SIZE - 1) mov r2, #0 @@ -78,7 +60,7 @@ bx lr -flushInvalidateDCacheRange: +ASM_FUNC flushInvalidateDCacheRange add r1, r1, r0 bic r0, r0, #(CACHE_LINE_SIZE - 1) mov r2, #0 @@ -91,14 +73,14 @@ bx lr -invalidateDCache: +ASM_FUNC invalidateDCache mov r0, #0 mcr p15, 0, r0, c7, c6, 0 @ Invalidate Entire Data Cache mcr p15, 0, r0, c7, c10, 4 @ Data Synchronization Barrier bx lr -invalidateDCacheRange: +ASM_FUNC invalidateDCacheRange add r1, r1, r0 tst r0, #(CACHE_LINE_SIZE - 1) mcrne p15, 0, r0, c7, c10, 1 @ "Clean Data Cache Line (using MVA)" diff --git a/source/arm11/gpio.s b/source/arm11/gpio.s index 72b9e0c..03d58cc 100644 --- a/source/arm11/gpio.s +++ b/source/arm11/gpio.s @@ -1,18 +1,12 @@ +#include "asmfunc.h" + .arm .cpu mpcore .fpu vfpv2 -.global gpio_set_bit -.global gpio_clear_bit - -.type gpio_set_bit STT_FUNC -.type gpio_clear_bit STT_FUNC - -.section ".text" - -gpio_set_bit: +ASM_FUNC gpio_set_bit ldrh r2, [r0] movs r3, #1 movs r1, r3, lsl r1 @@ -21,7 +15,7 @@ bx lr -gpio_clear_bit: +ASM_FUNC gpio_clear_bit ldrh r2, [r0] movs r3, #1 movs r1, r3, lsl r1 diff --git a/source/arm11/start.s b/source/arm11/start.s index e7bf51c..0b161cf 100644 --- a/source/arm11/start.s +++ b/source/arm11/start.s @@ -23,7 +23,7 @@ .extern __libc_init_array .extern main -.section ".crt0" +.section ".crt0", "ax" @@ -110,6 +110,7 @@ subs r1, r1, #1 bne stubExceptionVectors_lp bx lr +.pool @ void clearMem(u32 *adr, u32 size) @@ -139,7 +140,6 @@ subs r1, r1, #4 bne clearMem_remaining_lp bx lr -.pool setupVfp: @@ -152,12 +152,10 @@ fmxr fpexc, r1 @ Write Floating-point exception register fmxr fpscr, r2 @ Write Floating-Point Status and Control Register bx lr -.pool _init: bx lr -.pool deinitCpu: diff --git a/source/arm9/cache.s b/source/arm9/cache.s index 003ab02..66cc049 100644 --- a/source/arm9/cache.s +++ b/source/arm9/cache.s @@ -1,27 +1,9 @@ +#include "asmfunc.h" + .arm .cpu arm946e-s .fpu softvfp -.global invalidateICache -.global invalidateICacheRange -.global flushDCache -.global flushInvalidateDCache -.global flushDCacheRange -.global flushInvalidateDCacheRange -.global invalidateDCache -.global invalidateDCacheRange - -.type invalidateICache STT_FUNC -.type invalidateICacheRange STT_FUNC -.type flushDCache STT_FUNC -.type flushInvalidateDCache STT_FUNC -.type flushDCacheRange STT_FUNC -.type flushInvalidateDCacheRange STT_FUNC -.type invalidateDCache STT_FUNC -.type invalidateDCacheRange STT_FUNC - -.section ".text" - #define ICACHE_SIZE (0x2000) #define DCACHE_SIZE (0x1000) @@ -29,13 +11,13 @@ -invalidateICache: +ASM_FUNC invalidateICache mov r0, #0 mcr p15, 0, r0, c7, c5, 0 @ "Flush instruction cache" bx lr -invalidateICacheRange: +ASM_FUNC invalidateICacheRange add r1, r1, r0 bic r0, r0, #(CACHE_LINE_SIZE - 1) invalidateICacheRange_lp: @@ -46,7 +28,7 @@ bx lr -flushDCache: +ASM_FUNC flushDCache mov r1, #0 flushDCache_outer_lp: mov r0, #0 @@ -62,7 +44,7 @@ b drainWriteBufferFlushInvalidate -flushInvalidateDCache: +ASM_FUNC flushInvalidateDCache mov r1, #0 flushInvalidateDCache_outer_lp: mov r0, #0 @@ -80,7 +62,7 @@ bx lr -flushDCacheRange: +ASM_FUNC flushDCacheRange add r1, r1, r0 bic r0, r0, #(CACHE_LINE_SIZE - 1) flushDCacheRange_lp: @@ -91,7 +73,7 @@ b drainWriteBufferFlushInvalidateRange -flushInvalidateDCacheRange: +ASM_FUNC flushInvalidateDCacheRange add r1, r1, r0 bic r0, r0, #(CACHE_LINE_SIZE - 1) flushInvalidateDCacheRange_lp: @@ -105,13 +87,13 @@ bx lr -invalidateDCache: +ASM_FUNC invalidateDCache mov r0, #0 mcr p15, 0, r0, c7, c6, 0 @ "Flush data cache" bx lr -invalidateDCacheRange: +ASM_FUNC invalidateDCacheRange add r1, r1, r0 tst r0, #(CACHE_LINE_SIZE - 1) mcrne p15, 0, r0, c7, c10, 1 @ "Clean data cache entry Address" diff --git a/source/arm9/exception.s b/source/arm9/exception.s index 3bfd45d..6d2b894 100644 --- a/source/arm9/exception.s +++ b/source/arm9/exception.s @@ -1,37 +1,25 @@ +#include "asmfunc.h" #include "mem_map.h" .arm .cpu arm946e-s .fpu softvfp -.global undefInstrHandler -.global prefetchAbortHandler -.global dataAbortHandler -.global irqHandler - -.type undefInstrHandler STT_FUNC -.type prefetchAbortHandler STT_FUNC -.type dataAbortHandler STT_FUNC -.type exceptionHandler STT_FUNC -.type irqHandler STT_FUNC - .extern deinitCpu .extern guruMeditation .extern irqHandlerTable -.section ".text" - -undefInstrHandler: +ASM_FUNC undefInstrHandler msr cpsr_f, #(0<<29) @ Abuse conditional flags in cpsr for temporary exception type storage b exceptionHandler -prefetchAbortHandler: +ASM_FUNC prefetchAbortHandler msr cpsr_f, #(1<<29) b exceptionHandler -dataAbortHandler: +ASM_FUNC dataAbortHandler msr cpsr_f, #(2<<29) -exceptionHandler: +ASM_FUNC exceptionHandler mov sp, #A9_EXC_STACK_END stmfd sp!, {r0-r14}^ @ Save all user/system mode regs except pc mrs r4, cpsr @@ -45,10 +33,9 @@ mov sp, r5 mov r1, r5 b guruMeditation @ r0 = exception type, r1 = reg dump ptr {cpsr, pc (unmodified), r0-r14} -.pool -irqHandler: +ASM_FUNC irqHandler stmfd sp!, {r0-r3, r12, lr} ldr r12, =(IO_MEM_ARM9_ONLY + 0x1000) @ REG_IRQ_IE ldm r12, {r1, r2} @@ -67,4 +54,3 @@ blxne r0 ldmfd sp!, {r0-r3, r12, lr} subs pc, lr, #4 -.pool diff --git a/source/arm9/start.s b/source/arm9/start.s index 7df50f4..33dc39d 100644 --- a/source/arm9/start.s +++ b/source/arm9/start.s @@ -24,8 +24,12 @@ .extern fake_heap_end .extern __libc_init_array .extern main +.extern irqHandler +.extern undefInstrHandler +.extern prefetchAbortHandler +.extern dataAbortHandler -.section ".crt0" +.section ".crt0", "ax" @@ -162,7 +166,6 @@ subs r1, r1, #4 bne clearMem_remaining_lp bx lr -.pool #define REGION_4KB (0b01011) @@ -300,7 +303,6 @@ @ Needed by libc _init: bx lr -.pool deinitCpu: