fusee-secondary: Remove restriction for loading from eMMC

fusee-secondary: Correct else-if condition in xmemmove() ...

Previously both the if and else conditions were the same.

fusee-secondary/fs_dev: Correct uninitialized cast within fsdev_seek() ...

Previously this was casting the same unassigned variable that was being
assigned to.

Define wait() in fusee-primary/secondary

Revert unnecessary change (thanks @rajkosto)

Fix multiple issues reported by Coverity Scan

fusee: Disable the SDCLK when switching to low voltage.

fusee: Disable the SDCLK when switching to low voltage.

fusee: Fix SDMMC high speed support and other bugs.

Fusee: Deployed new SDMMC driver in fusee-secondary. All stages boot now. ...

Fusee: Fixed wrong argument in se.c function.
Fusee: Improved timers.

fusee: Correct wrong comment (thanks @desowin)

Merge pull request #161 from TheDgtl/fix_4xx_kernel ...

Fix issue with fusee-secondary 4.x kernel patches

fusee: Temporarily disable anything that prevents the fusee-primary to fusee-secondary transition.

fusee: SDMMC driver re-design: ...

- Based on hekate's, linux's and u-boot's source code;
- Full support for SD and MMC;
- Fixes multiple issues;
- Deployed first in fusee-primary.

fusee: Code cleanup and style fixes.

Fix issue with fusee-secondary 4.x kernel patches

Replace NAND by eMMC ...

Using NAND doens't really make sense

Fusee: lfs kernel patches for 3.0.0/3.0.2

Fusee: Complete hashes (Thanks @Thog), lfs patches for 2.0.0

Fusee: Add kernel patches for 1.0.0.

Fix a few issues in the secondary kernel_patches.c file

Merge pull request #145 from Traiver/master ...

fusee: Add 4.1.0 kernel patch definitions

Update kernel_patches.c

Update kernel_patches.c

Update kernel_patches.c

add kernel patches for 4.1.0

fusee: correct 4.x free_code_space_offset value

fusee: Add 3.0.0-3.0.1 kernel hash (and free_code_space_offset)

Rework sdmmc clocking configuration ...

Use 204 MHz as host clock in SDR104 mode instead of 136 MHz.
Due to this, also change the frequency init divider so the
initialization frequency is below 400 kHz.
This makes the clocks for SDMMC1 in all modes to match the TRM table.

Make it clear in the code that HS200/HS400 modes in fact use PLLP_OUT0
and not PLLC4_OUT2_LJ like the comment suggest. In fact selecting the
PLLC4_OUT2_LJ as clock source results in freeze after switching to
HS200/HS400 mode. This is most likely related to the PLLC4 not being
enabled, but it should be checked later.

Set the HS200/HS400 divider to 3, as this is what the code really did
set prior to this change - so this commit does not change that.

Configure Legacy 12 MHz clock to run at 12 MHz using the SW default
configuration (as per TRM) for the SDMMC legacy timer.

Introduce initial version of sdmmc_host_clock_delay() in order to use it
in places where the wait is host clock dependent. The way it is
implemented now does not change the sleep that was used instead.

fusee: Run periodic autocal only on the uSD controller (#137)

Merge pull request #132 from tslater2006/master ...

Add sdmmc_dump_regs function